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You are invited to contribute to this knowledgebase on design. Feel free to edit existing pages or add new ones on Aspects of IC Design be it ASIC FPGA or Systems This Wiki has been setup to consolidate the knowledge on [[System Architecture]] [[ASIC Design]] and [[Digital Design]] Techniques. We will be covering Traditional HDL's like [[Verilog]], [[VHDL]] and [[ESL]] Tools based on C, C++, [[System Verilog]] We will cover different modeling strategies using [[SystemC]], [[SpreadSheets]], [[NS2]], [[OmnetPP]] etc. And finally we will look at [[Verification]] both [[formal verification]] and [[dynamic simulations]] and [[Synthesis]] This wiki currently contains the following topics ~~ORPHANSWANTED:valid~~ There is a need for a new page on one of the following subjects. Please create them if possible ~~ORPHANSWANTED:wanted~~ The following pages have been started but would benefit from your help to completion {{topic>incomplete}} ~~TAGCLOUD~~ ~~CLOUD~~